1. Field of the Invention
The present invention relates to a thyristor and a method of fabricating the same, and more particularly, it relates to a thyristor having a compensating structure for improving dv/dt resistance and a method of fabricating the same.
2. Background of the Invention
With increase in voltage and capacity of a thyristor valve which is applied to a converter such as a power converter for dc power transmission or a reactive power compensator, replacement of an existing thyristor by an optical trigger thyristor is strongly required. When an optical trigger thyristor is applied to such a converter, it is possible to improve electrical insulation between a main circuit and a control circuit and noise resistance as well as to simplify the control system, whereby the device can be advantageously miniaturized, reduced in weight and improved in reliability.
However, currently available optical trigger energy is so feeble as compared with electric trigger energy that it is necessary to increase photosensitivity of an optical trigger thyristor to several 10 times in terms of gate sensitivity of an electric trigger thyristor. When gate sensitivity is increased, however, the thyristor tends to operate in response to a rapidly rising voltage noise such as a lightening surge which is mixed from the main circuit side. An allowable voltage build-up rate causing no malfunction upon application of an excess voltage is called dv/dt resistance. When the area of a photoreceiving portion of an optical trigger thyristor is reduced for reducing a displacement current which is generated in this region, it is possible to increase the dv/dt resistance at no sacrifice of photosensitivity. In this case, however, a conduction region in an initial turn-on (ignition) stage, leading to reduction in resistance (called di/dt resistance) against a rapidly rising ON-state current which is generated in the initial turn-on stage. Thus, it is the most important technical subject to implement an optical trigger thyristor having high photosensitivity at no sacrifice of principal thyristor characteristics such as the dv/dt resistance and the di/dt resistance.
&lt;Structure of Prior Art&gt;
FIG. 75 is a sectional view showing a conventional optical thyristor which is disclosed in Japanese Patent Publication No. 1-36712 (1989). Referring to FIG. 75, arrangement of electrodes and the like are corrected for the purpose of illustrating the operation principle. A more correct sectional view is shown in FIG. 78 as described later. FIG. 76 is an enlarged sectional view showing a portion which is close to a cathode electrode of the optical thyristor shown in FIG. 75.
In this conventional device, four stage unit thyristors in total including first to third stage auxiliary thyristors ST.sub.1 to ST.sub.3 and a main thyristor MT are arranged in parallel with each other on a semiconductor substrate having four stacked semiconductor layers including a P emitter layer 2004, an N base layer 2003, a P base layer 2002 and N emitter layers (i.e., a main emitter layer 2001 and auxiliary emitter layers 2005a to 2005c). The P emitter layer 2004 and the P base layer 2002 are exposed on lower and upper major surfaces of the semiconductor substrate respectively. The auxiliary emitter layers 2005a to 2005c forming the auxiliary thyristors ST.sub.1 to ST.sub.3 respectively and the main emitter layer 2001 forming the main thyristor MT are selectively formed on an upper major surface portion of the P base layer 2002, to be separated from each other through the P base layer 2002.
A collector electrode 2007 (Sd) is formed to be electrically connected to an upper major surface of the P base layer 2006 which is adjacent to the main emitter layer 2001. The auxiliary thyristors ST.sub.1 to ST.sub.3 are formed to be enclosed with the collector electrode 2007. In the auxiliary thyristor ST.sub.1, the N emitter layer 2005a is annularly provided around a photoreceiving portion 2014 (G.sub.1), while an emitter electrode 2010a (E.sub.1) is formed on an upper major surface of the N emitter layer 2005a to be electrically connected to the same. In the auxiliary thyristors ST.sub.2 and ST.sub.3, on the other hand, emitter electrodes 2010b (E.sub.2) and 2010c (E.sub.3) are formed on upper surfaces of the emitter layers 2005b and 2005c respectively, while gate electrodes 2011a (G.sub.2) and 2011b (G.sub.3) are formed on the upper surface of the P base layer 2002 to be electrically connected to the same respectively. Among these, the emitter electrode 2010c of the auxiliary thyristor ST.sub.3 is integrally formed with the collector electrode 2007.
Further, the gate electrodes 2011a and 2011b of the auxiliary thyristors ST.sub.2 and ST.sub.3 are electrically connected to the emitter electrodes 2010a and 2010b of the precedent stage auxiliary thyristors ST.sub.1 and ST.sub.2 through wiring layers 2012a and 2012b of Al wires or the like respectively. Therefore, the respective stage auxiliary thyristors ST.sub.2 and ST.sub.3 receive turn-on currents flowing through the emitter electrodes 2010a and 2010b of the precedent stage auxiliary thyristors ST.sub.1 and ST.sub.2 as gate currents respectively, thereby carrying out turn-on operations. An anode electrode 2009 (A) and a cathode electrode 2008 (K) are formed on a lower major surface of the P emitter layer 2004 and an upper major surface of the main emitter layer 2001 to be electrically connected thereto respectively. The main emitter layer 2001 is provided with a number of through holes which are filled up with the P base layer 2002, i.e., short-circuiting portions 2013. The cathode electrode 2008 also covers upper major surfaces of the short-circuiting portions 2013, thereby being short-circuited not only with the main emitter layer 2001 but with the P base layer 2002.
&lt;Operation of Prior Art&gt;
In employment, the thyristor having the aforementioned structure is connected to an external power source (not shown), so that a positive voltage is applied across the anode electrode 2009 and the cathode electrode 2008. When an optical gate signal h.nu. is applied to the photoreceiving portion 2014 in this state, a photoelectric current Iph is mainly generated in a depletion layer region of a central junction of the auxiliary thyristor ST.sub.1. The photoelectric current Iph as generated flows into the P base layer 2002. This photoelectric current Iph transversely flows in the P base layer 2002 to pass through the collector electrode 2007 which is provided on the upper major surface of the P base layer 2002, and thereafter flows into the cathode electrode 2008 through the short-circuiting portions 2013 which are provided between the P base layer 2002 and the cathode electrode 2008. Consequently, the photoelectric current Iph causes a transverse potential difference in a region of the P base layer 2002 which is occupied by the auxiliary thyristor ST.sub.1, thereby forward-biasing the N emitter layer 2005a of the auxiliary thyristor ST.sub.1. When the largest potential difference of the forward-bias voltage approaches the value of a diffusion potential of the junction between the N emitter layer 2005a and the P base layer 2002, electron injection from the N emitter layer 2005a into the P base layer 2002 is abruptly increased to turn on the auxiliary thyristor ST.sub.1 from the junction.
The turn-on current for the auxiliary thyristor ST.sub.1 is applied to the gate electrode 2011a of the auxiliary thyristor ST.sub.2 through the wiring layer 2012 as a gate current, thereby turning on the auxiliary thyristor ST.sub.2. The auxiliary thyristor ST.sub.3 is also turned on and the turn-on current therefor flows from the collector electrode 2007 to the cathode electrode 2008 through the short-circuiting portions 2013. At this time, the turn-on current for the auxiliary thyristor ST.sub.3 functions as a gate current for the main thyristor MT.
The turn-on current for the auxiliary thyristors is successively increased in proportion to the number of the stages. Therefore, the gate current for the main thyristor MT is by far larger than the aforementioned photoelectric current Iph, for applying a sufficiently large forward bias to the main emitter layer 2001. Consequently, the main thyristor MT is turned on, whereby a main current flows from the anode electrode 2009 to the cathode electrode 2008.
Consider that a voltage noise having a large voltage change rate, i.e., a large dv/dt value, is applied across the anode electrode 2009 and the cathode electrode 2008. At this time, displacement currents I.sub.1 to I.sub.3 and I.sub.m corresponding to junction capacitances C.sub.1 to C.sub.3 and C.sub.m are generated in the respective thyristors from P-N junctions which are formed between the N base layer 2003 and the P base layer 2002. The displacement currents I.sub.1 to I.sub.3 which are generated in response to the junction capacitances C.sub.1 to C.sub.3 of the auxiliary thyristors ST.sub.1 to ST.sub.3 transversely flow in the P base layer 2002 toward the collector electrode 2007 respectively, accumulated in the collector electrode 2007, and thereafter flow into the cathode electrode 2008 through the short-circuiting portions 2013. As shown in FIG. 76 in an enlarged manner, a displacement current which is generated in the junction capacitance C.sub.m of the main thyristor MT joins with the displacement currents I.sub.1 to I.sub.3 for forming the displacement current I.sub.m, which in turn flows into the cathode electrode 2008 from the short-circuiting portions 2013. Namely, the displacement currents I.sub.1 to I.sub.3 and I.sub.m flow through the same paths as the trigger currents such as the photoelectric current and the gate currents.
The displacement currents I.sub.1 to I.sub.3 cause transverse potential differences in portions of the P base layer 2002 which are located under the auxiliary emitter layers 2005a, 2005b and 2005c of the auxiliary thyristors ST.sub.1 to ST.sub.3 respectively. Similarly, the displacement current I.sub.m causes a transverse potential difference in a portion of the P base layer 2002 which is located under the main emitter layer 2001. Consequently, potentials of the portions of the P base layer 2002 which are along the bottom surfaces of the N emitter layers 2005a, 2005b, 2005c and 2001 are changed along the paths of the displacement currents I.sub.1 to I.sub.3 and I.sub.m. A voltage across a portion of the P base layer 2002 having the highest potential which is located immediately under the auxiliary emitter layer 2005 and the collector electrode 2007 is provided by the product of a resistance R.sub.1 of the portion of the P base layer 2002 which is along the path of the displacement current I.sub.1 and the displacement current I.sub.1. If the displacement current I.sub.2 is not present, this voltage functions to forward-bias the P-N junction between the auxiliary emitter layer 2005a and the portion of the P base layer 2002 which is located immediately under the same, so that the auxiliary thyristor ST.sub.1 is turned on when this forward bias voltage reaches the diffusion potential of the junction. Namely, the displacement current I.sub.1 causes abnormal turn-on (abnormal ignition) of the auxiliary thyristor ST.sub.1.
Similarly, the voltage across the portion of the P base layer 2002 having the highest potential which is located immediately under the auxiliary emitter layer 2005b and the collector electrode 2007 is provided by the product of a resistance R.sub.2 of the P base layer 2002 which is along the path of the displacement current I.sub.2 and the displacement current I.sub.2. If the displacement current I.sub.3 is not present, this voltage functions to forward-bias the P-N junction between the auxiliary emitter layer 2005b and the portion of the P base layer 2002 which is located immediately under the same, so that the auxiliary thyristor ST.sub.2 is turned on when this forward bias voltage reaches the diffusion potential of the junction.
Similarly, the voltage across the portion of the P base layer 2002 having the highest potential which is located immediately under the auxiliary emitter layer 2005c and the collector electrode 2007 is provided by the product of a resistance R.sub.3 of the P base layer 2002 along the path of the displacement current I.sub.3 and the displacement current I.sub.3. As shown in FIG. 76 in an enlarged manner, further, the voltage across the portion of the P base layer 2002 having the highest potential which is located immediately under the main emitter layer 2001 and the cathode electrode 2008 is provided by the product of a resistance R.sub.m of the P base layer 2002 along the path of the displacement current I.sub.m and the displacement current I.sub.m.
FIG. 77 is a circuit diagram equivalently expressing a circuit which is related to behavior of the displacement currents I.sub.1 to I.sub.3 and I.sub.m. Diodes D.sub.1 to D.sub.3 and D.sub.m express the P-N junctions between the N emitter layers 2005a, 2005b, 2005c and 2001 and the portions of the P base layer 2002 which are adjacent thereto respectively. The diodes D.sub.1 to D.sub.3 and D.sub.m are so expressed that the same are serially connected in this order, and this reflects the fact that the emitter electrodes of the respective stage unit thyristors are connected to the next stage gate electrodes.
As shown in this circuit diagram, the voltage provided by the product of the displacement current I.sub.1 and the resistance R.sub.1 is not applied as such to the diode D.sub.1 as a forward bias voltage, but attenuated by the voltage provided by the product of the displacement current I.sub.2 and the resistance R.sub.2. Similarly, a voltage obtained by subtracting the voltage provided by the product of the displacement current I.sub.3 and the resistance R.sub.3 from that provided by the product of the displacement current I.sub.2 and the resistance R.sub.2 is applied to the diode D.sub.2 as a forward voltage. Namely, this optical thyristor suppresses the initial and second stage unit thyristors ST.sub.1 and ST.sub.2 from abnormal ignition caused by the displacement currents, due to the action of the properly arranged collector electrode 2007.
It is also possible to substantially cancel the forward bias voltages which are applied to the diodes D.sub.1 and D.sub.2 by properly setting the values of the resistances R.sub.1 to R.sub.3. The resistances R.sub.1 to R.sub.3 and R.sub.m along the paths of the displacement currents I.sub.1 to I.sub.3 and I.sub.m substantially correspond to transverse resistances of the portions of the P base layer 2002 which are located immediately under the N emitter layers 2005a, 2005b, 2005c and 2001 respectively. Therefore, it is possible to effectively suppress abnormal ignition of the initial and second stage auxiliary thyristors ST.sub.1 and ST.sub.2 by properly controlling the transverse resistances in these portions of the P base layer 2002. Thus, this optical thyristor implements high dv/dt resistance.
&lt;Structure of Electrode in Prior Art&gt;
FIGS. 78 and 79 are a front sectional view and a plan view of the conventional device shown in FIG. 75. These figures correctly illustrate the number of stages of the auxiliary thyristors as well as arrangement and structures of the electrodes along the aforementioned gazette. Namely, this conventional device comprises six stage unit thyristors in total including five stage auxiliary thyristors ST.sub.1 to ST.sub.5 and a main thyristor MT, as shown in these figures. The semiconductor substrate has a stacked structure of a P emitter layer 3021, an N base layer 3022, a P base layer 3023 and N emitter layers 3024a to 3024f, and the N emitter layers 3024a to 3024f form the auxiliary thyristors ST.sub.1 to ST.sub.5 and the main thyristor MT respectively. Emitter electrodes 3027 to 3031 (E.sub.1 to E.sub.5) of the auxiliary thyristors ST.sub.1 to ST.sub.5 are provided on the N emitter layers 3024a to 3024e respectively, while a cathode electrode 3037 (K) is provided on the main emitter layer 3024f. An anode electrode 3038 (A) is formed on a lower major surface of the P emitter layer 3021.
Further, a collector electrode 3025 (Sd) is provided on the P base layer 3023, and the emitter electrode 3031 of the auxiliary thyristor ST.sub.5 is integrally formed with the collector electrode 3025. Gate electrodes 3032 to 3035 (G.sub.2 to G.sub.5) of the auxiliary thyristors ST.sub.2 to ST.sub.5 are formed on the P base layer 3023, so that these gate electrodes 3032 to 3035 are electrically connected to the emitter electrodes of the precedent stage auxiliary thyristors through aluminum wires 3036 respectively. Further, the initial stage auxiliary thyristor ST.sub.1 is provided with a photoreceiving portion 3026.
The collector electrode 3025, which also serves as a gate electrode of the main thyristor MT, is arranged to be enclosed with the cathode electrode 3037, for effectively implementing normal ignition of the main thyristor MT (see FIG. 79). Further, the auxiliary thyristors ST.sub.1 to ST.sub.5 are arranged inside the collector electrode 3025 to be independently enclosed with the collector electrode 3025 respectively. Thus, paths of displacement currents I.sub.1 to I.sub.5 (not shown) which are generated in the respective auxiliary thyristors ST.sub.1 to ST.sub.5 are effectively separated from each other. Since the paths of the displacement currents I.sub.1 to I.sub.5 are separated from each other, it is possible to attenuate forward bias voltages which are applied to the auxiliary thyristors due to the displacement currents.
While this conventional device comprises five stage auxiliary thyristors, normal ignition by an optical gate signal and behavior with respect to the displacement currents are similar to those of the aforementioned device comprising three stage auxiliary thyristors. When an optical signal is inputted, the auxiliary thyristors ST.sub.1 to ST.sub.5 successively ignite while amplifying a turn-on current, so that the main thyristor MT finally ignites by the amplified turn-on current. Further, the collector electrode 3025 serves to suppress the initial to fourth stage auxiliary thyristors ST.sub.1 to ST.sub.4 from abnormal ignition caused by the displacement currents derived from a voltage noise or the like.
Due to the aforementioned structure, however, the conventional optical thyristor has the following problems:
As shown in the circuit diagram of FIG. 77, the voltage corresponding to the product of the displacement current I.sub.3 and the resistance R.sub.3 is applied as such to the diode D.sub.3 as a forward bias. Similarly, the voltage corresponding to the product of the displacement current I.sub.m and the resistance R.sub.m is applied as such to the diode D.sub.m as a forward bias. Namely, voltages by the displacement currents are applied as such to the P-N junctions between the auxiliary emitter layer 2005c of the final stage auxiliary thyristor ST.sub.3 and the P base layer 2002 and between the main emitter layer 2001 of the main thyristor MT and the P base layer 2002 with no attenuation. This remains unchanged also when the number of stages is different. Namely, auxiliary thyristors which are suppressed from abnormal ignition caused by displacement currents are limited to that of the first stage to that which is precedent to the main thyristor by two stages, and the final auxiliary thyristor and the main thyristor are not suppressed from abnormal ignition in the conventional optical thyristor. This leads to such a problem that it is impossible to suppress abnormal ignition when only one stage auxiliary thyristor is present, i.e., when the optical thyristor is formed by only two stage unit thyristors including one stage auxiliary thyristor and a main thyristor.
As clearly understood from the circuit diagram shown in FIG. 77, further, the displacement currents I.sub.1 to I.sub.3 which are accumulated in the collector electrode 2007 flow to the cathode electrode (K) through the resistance R.sub.m with the displacement current I.sub.m generated in the main thyristor MT. Thus, the displacement currents generated in the auxiliary thyristors disadvantageously facilitate abnormal ignition of the main thyristor MT.
In order to suppress the main thyristor MT from such abnormal ignition, it is necessary to set the short-circuiting portions 2013 in large areas. When the areas of the short-circuiting portions 2013 are increased, however, an ON-state voltage which is required for normal ignition is increased and normal ignition is hindered, leading to reduction in di/dt resistance and increase in turn-on time. Namely, it is difficult to attain compatibility between improvement of dv/dt resistance and assurance of di/dt resistance.
In this optical thyristor, further, it is necessary to enclose all auxiliary thyristors with the collector electrode, and hence the collector electrode is increased in size and the cathode area of the main thyristor is relatively reduced in response thereto, leading to increase in ON-state voltage and reduction in surge current resistance.
In addition, the gate electrodes 3032 to 3035 of the auxiliary thyristors ST.sub.2 to ST.sub.5 and the emitter electrodes 3027 to 3030 of the precedent stage auxiliary thyristors ST.sub.1 to ST.sub.4 are electrically connected with each other through the aluminum wires in FIG. 78, and hence the gate electrodes 3032 to 3035 and the emitter electrodes 3027 to 3030 may be short-circuited or disconnected. Further, the fabrication process is complicated through the fabrication steps for wiring and connecting these electrodes with each other through the aluminum wires or the like.